Your First CPU

Your First CPU - Chapter 4 - Pipelining

Tue, 18 Nov 2008 15:10:13 GMT

There are four cycles in our previous CPU design, Fetch, Decode, Execute and Store (aka 'Write back'). In our current cpu design these 4 cycles are performed one at a time, thus our CPU executes an instruction from memory for every 4 cycles of the CPU clock. With a few changes we can increase our performance substantially to almost achieve a single instruction per clock cycle.

Your First CPU - Chapter 3 - Your First Assembler

Mon, 07 Apr 2008 12:03:46 GMT

What good is a cpu without an assembler? In this chapter we use flex and bison (i.e. lex and yacc) to make an assembler for our cpu. The assembler generates a binary file that can be loaded by the verilog $readmemh statement, or in a synthesized FPGA we would use the binary file to initialize the instruction memory inside the FPGAs internal memory blocks.

Your First CPU - Chapter 2 - Branching

Sun, 30 Mar 2008 19:30:15 GMT

Before we move on to updating our basic cpu verilog code let us talk a little more about the four basic units of a cpu. These parts are typically called the Datapath, Function Unit or ALU, Memory/Register File and the Control Unit. Any cpu must at least have these four basic blocks.

Your First CPU - Chapter 1 - Basic CPU

Sat, 29 Mar 2008 08:34:18 GMT

In this first chapter we learn the very basics of a CPU's core logic. We include basic Function Unit logic such as logical operators and math functions. To keep our first chapter simple, branching is not yet implemented so our programs are strictly linear and cannot include loop constructs. Also, the program code is included directly in the CPU source file.