Verilog source code, testbench, and output files for the controller. This source code was developed using Icarus verilog in Linux. To compile and run the testbench simply run make. The included Makefile runs the Icarus compiler and processor with the proper arguments. You should see some output from the testbench results. There is also a vcd dumpfile generated for gtkwave.

Verilog source code, testbench, and output files for the controller. This source code was developed using Icarus verilog in Linux. To compile and run the testbench simply run make. The included Makefile runs the Icarus compiler and processor with the proper arguments. You should see some output from the testbench results. There is also a vcd dumpfile generated for gtkwave.

This is the front panel schematics for the ac97 expansion board for the NGW100 AVR evaluation kit with contains an AVR32AP7001 32-bit processor.